(1) Field of the Invention
The present invention relates to an integrated circuit (IC) device. More particularly, it relates to an IC device such as a gate array IC device in which circuit patterns connecting the outer cells and inner cells are simplified.
(2) Description of the Prior Art
In general, an IC device such as a gate array IC device comprises an inner cell array having a plurality of inner cells, i.e., basic cells; an outer cell array having a plurality of outer cells; inner power supply lines; and outer power supply lines. The outer cell array and the outer power supply lines are formed around the inner cell array. Each of the inner cells includes inner circuits of the IC device, such as gate circuits and flip-flop circuits. Each of the outer cells has one or more input/output buffer circuits. From the outer power supply lines, a plurality of inner power supply lines extend toward and onto the inner cell array.
In a conventional IC device, the outer cells and the inner cells are arranged regularly, i.e., at constant pitches, on the semiconductor chip in order to simplify the design automation (DA) process and so on. However, no consideration is given to the relation between the pitch length of the outer cells and the pitch length of the inner cells. The pitch length of the outer cells is adjusted to the pitch length of the bonding pads of the IC device, while the pitch length of the inner cells is determined by the size, number, and connecting patterns of the inner circuits and so on. In other words, the pitch lengths of the outer cells and the inner cells are determined independently from each other.
Therefore, in the conventional IC device, the circuit patterns connecting the basic cells and the outer cells, and the positions of the connecting terminals of the cells, differ from each other for every basic cell and for every outer cell.
Moreover, since the inner power supply lines are usually formed on the inner cell array including the inner cells and parts of the area of the inner cell array are covered with the inner power supply lines, the positions of the connecting patterns of the inner cells are limited, although the inner power supply lines are disposed at a pitch length equal to or several times the pitch length of the inner cells. For this reason and along with the aforementioned disadvantages, the circuit patterns of the conventional IC device are complicated and design thereof is difficult.
Generally, a master slice type IC device comprises electronic parts such as transistors formed at predetermined positions on a semiconductor chip. Parts of the circuit patterns connecting the electronic parts, gate circuits, flip-flop circuits, and so on, are previously formed. In the DA process, information of several kinds of circuit patterns connecting the electronic parts is stored in a library file of a computer system. Information of selected circuit patterns from the library file is input to a connecting pattern forming means, whereby the desired circuit patterns are formed on the semiconductor chip. In such a process, it is preferable that connections between the inner cells and the outer cells are effected by using a smaller number of connecting patterns. However, in the above-mentioned conventional IC device, since the pitch lengths of the outer cells and the inner cells are different and independent, there are as many versions of the connecting patterns as there are outer cells or input/output buffers. This complicates the overall circuit pattern of the IC device. That is, in the conventional IC device, it is necessary to prepare the different connecting patterns connecting the input/output buffers and the basic cells. This makes it difficult to simplify the circuit pattern of the IC device. The large number of pattern versions complicates the process of design automation and increases the required capacity of the library files storing the connecting patterns.